When R Stopped Meaning RISC

From hand-typed hex on a Samsung SPC-1000 to ARM assembly on an embedded Linux board — the long, slightly anticlimactic story of RISC vs CISC.

A look back — long before any of the tools we argue about now.

Reaching for machine code

The first machine code I remember was a handful of game routines for the Samsung SPC-1000, copied out of a computer-study magazine. Long strings of hexadecimal, written out like an incantation; you keyed them in value by value, ran a final call, and got one of two outcomes — something happened, or you had to switch the machine off and back on. I had no idea what any of it meant. I do remember coloring in graph paper, square by square, building little mosaics — though looking back, those were fonts and black-and-white pictures, not instructions.

MASM

My first real encounter with machine code was the Microsoft Macro Assembler (MASM), a final project in a systems-programming course in my sophomore year. Until then, programming had been the things you could more or less reason about — if/then, for, print. Then came this alien thing called an assembler — assembly? — that wasn’t even quite machine code, and the project was to implement one. I solved it with a great deal of patience and one enormous switch statement, stitched together by hand. I was quietly proud of it.

RISC vs CISC

A lot of memories are tangled here, but the birth of RISC, as I learned it in an architecture course, genuinely moved me. The idea of a better machine somewhere out there — and what it took to make it possible: first, you put a pipeline inside the CPU and arrange the instructions so several can run at once; second, you handle all the side effects, the hazards, that this creates; third, the improved compiler techniques that make it all work; fourth, the cache that maximizes the whole thing. Exam questions were the how would you resolve this hazard sort. I have a memory of building actual circuits in Synopsys VHDL too, so it must have been somewhere in there.

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I thought of it as a beautiful story, set against Intel’s CISC camp on the other side. But CISC vs RISC turned out to fizzle, anticlimactically. For one, RISC’s instruction count was never actually small — reduced, really? Intel’s Pentiums were CISC but borrowed RISC ideas internally; PowerPC faded; and so on. Did these camps even need to fight? It came to feel a little pointless.

ARM / StrongARM / ARM7 / XScale

I met RISC again later, through ARM, once I started working on embedded Linux. ARM stood for Advanced RISC Machine — or Acorn RISC Machine — and at a small company whose iPAQ days are now a fond memory, I chased one CPU after another, working on the Linux kernel, compilers, device drivers. I did a fair amount of ARM assembly. I knew back then that the R stood for RISC, but the fact slipped out of memory for a long time, and seeing ARM mentioned everywhere now, I pull it back out and turn it over. The R isn’t really the R of RISC anymore — it’s just the R of ARM.

Intel even built a new CPU called XScale, and I remember using it early on, with projects that dynamically scaled the CPU clock. The smartphone we tried to build on Linux, QT, the Sharp Zaurus — those memories run on to Symbian, and then to Android at Google. But that’s a 2000s story, for somewhere else.

P.S. Watching how neatly all of this is now laid out on Wikipedia, I think back on the enormous effort it once took just to gather that information — and I suspect the patience it demanded had something to do with making me who I am.

Part of 90s Computer Science Stories — first-person notes on growing up with computers and studying CS in Korea in the 1980s and ’90s. See the full series →

Adapted from my Korean essay on Brunch: brunch.co.kr/@chaesang/36